Software Reset - Renesas 7700 FAMILY User Manual

RESET

13.2 Software reset

13.2 Software reset
When the power source voltage satisfies the microcomputer's recommended operating conditions, the
microcomputer is reset by writing "1" to the software reset bit (bit 3 at address 5E
software reset. In this case, the microcomputer initializes pins, CPU, and SFR area just as in the case of
a hardware reset. However, the microcomputer retains the contents of the internal RAM area. (Refer to
Table 13.1.1 and Figures 13.1.2 to 13.1.6.) Figure 13.2.1 shows the structure of processor mode register 0.
After completing initialization, the microcomputer performs the internal processing sequence after a reset.
(Refer to Figure 13.1.7.) After that, it executes a program beginning from the address set into the reset
vector addresses which are FFFE
b7 b6 b5 b4 b3 b2
0 0
Fig. 13.2.1 Structure of processor mode register 0
13–12
and FFFF
16
b1 b0
Processor mode register 0 (Address 5E
Bit
Processor mode bits
0
1
Fix this bit to "0."
2
Software reset bit
3
Interrupt priority detection time
4
select bits
5
Fix this bit to "0."
6
Clock
1
7
Notes 1: While supplying the Vcc level to the CNVss pin, this bit becomes "1." (Fixed to "1.")
2: This bit is ignored in the microprocessor mode. (It may be either "0" or "1.")
: Bits 0 to 2, and bits 4 to 7 are not used for software reset.
7751 Group User's Manual
16.
)
16
Bit name
b1 b0
0 0 : Single-chip mode
0 1 : Memory expansion mode
1 0 : Microprocessor mode
1 1 : Not selected
The microcomputer is reset by
writing "1" to this bit. The value is
"0" at reading.
b5 b4
0 0 : 7 cycles of
0 1 : 4 cycles of
1 0 : 2 cycles of
1 1 : Not selected
0 : Clock
output select bit
(P4
(Note 2)
I/O port.)
1 : Clock
(P4
put pin.)
16
Functions
i
output disabled
1
functions as a programmable
2
output enabled
1
functions as a clock out-
2
1
). This is called a
RW
At reset
0 RW
0
RW
(Note 1)
RW
0
0 WO
RW
0
RW
0
RW
0
0 RW