Transfer clock
Fig. 7.3.10 Receive operation
UARTi receive register
UARTi receive buffer register
7751 Group User's Manual
7.3 Clock synchronous serial I/O mode
MSB
D
0
D
D
1
0
D
D
D
2
1
0
D
D
D
D
D
7
6
5
4
b7
Receive data
SERIAL I/O
LSB
D
D
D
3
2
1
0
b0
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