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APPLICATIONS
17.1 Memory expansion
M37751
A
–A
1
CNV
SS
BYTE
ALE
A
/D
8
A
/D
15
A
/D
16
A
/D
23
R/W
BHE
X
X
OUT
IN
16 MHz
1: Use the elements of which propagation delay time is within 42.5 ns.
2: Use the elements of which output enable time is 5 ns or more and output disable time is
within 40.5 ns.
Fig. 17.1.15 Example for using bus buffer (at low-speed running-2 : connecting with memory requiring
long hold time for write)
17–20
7
–
8
15
–
0
7
E
1D1Q
2D
1T
2T
AC04
AC74
1
1
1
AC04
A
0
AC32
7751 Group User's Manual
Address bus
AC573
D Q
LE
OE
AC573
D Q
LE
OE
2
ALS245A
A
B
DIR
OC
2
ALS245A
A
B
DIR
OC
This circuit ensures that the rising of the
write signal occurs 1/2
extend the write hold time.
2Q
AC32
Circuit condition : 3 access in low-speed running
Data bus (odd)
Data bus (even)
clock earlier to
1
RD
WO
WE
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