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15.11 Memory expansion mode and microprocessor mode : When 3- φ access in high-speed running
Switching characteristics (V
Symbol
t
Port P0 address hold time
h(E–P0A)
t
Port P1 address hold time (BYTE = "L")
h(ALE–P1A)
t
Port P1 data hold time (BYTE = "L")
h(E–P1Q)
t
Port P1 floating release delay time (BYTE = "L")
pzx(E–P1Z)
t
Port P1 address hold time (BYTE = "H")
h(E–P1A)
t
Port P2 address hold time
h(ALE–P2A)
t
Port P2 data hold time
h(E–P2Q)
t
Port P2 floating release delay time
pzx(E–P2Z)
____
t
BHE
h(E–BHE)
__
t
h(E–RW)
R/W
Note: For test conditions, refer to Figure 15.15.1.
ELECTRICAL CHARACTERISTICS
= 5 V±10%, V
CC
Parameter
hold time
hold time
7751 Group User's Manual
= 0 V, Ta = –20 to 85 °C, f(X
SS
) = 40 MHz, unless otherwise noted)
IN
Limits
Data formula
(Min.)
Min.
9
1
10
– 10
15
f(X
)
IN
1
10
9
– 15
10
f(X
)
IN
9
1
10
– 10
15
f(X
)
IN
1
10
9
– 10
15
f(X
)
IN
1
10
9
– 10
15
f(X
)
IN
9
1
10
– 15
10
f(X
)
IN
9
1
10
– 10
15
f(X
)
IN
9
1
10
– 10
15
f(X
)
IN
9
1
10
15
– 10
f(X
)
IN
9
1
10
– 10
15
f(X
)
IN
Unit
Max.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15–35
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