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SERIAL I/O
7.2 Block description
The UARTi transmit buffer register is used to set transmit data. Set the transmit data into the low-order
byte of this register when operating in the clock synchronous serial I/O mode or when a 7-bit or 8-bit length
of transfer data is selected in the UART mode. When a 9-bit length of transfer data is selected in the UART
mode, set the transmit data into the UARTi transmit buffer register as follows:
•Bit 8 of the transmit data into bit 0 of high-order byte of this register.
•Bits 7 to 0 of the transmit data into the low-order byte of this register.
The transmit data which is set in the UARTi transmit buffer register is transferred to the UARTi transmit
register when the transmission conditions are satisfied, and then it is output from the TxD
with the transfer clock. The UARTi transmit buffer register becomes empty when the data which is set in
the UARTi transmit buffer register is transferred to the UARTi transmit register. Accordingly, the user can
set next transmit data.
When selecting the "MSB first" in the clock synchronous serial I/O mode, the data of which bit position was
reversed is written, as a transmit data, into the UARTi transmit buffer register. (Refer to section "7.3.2
Transfer data format.") Transmission operation itself is the same whichever format is selected, "LSB first"
or "MSB first."
When quitting the transmission which is in progress and setting the UARTi transmit buffer register again,
follow the procedure described bellow:
Clear the serial I/O mode select bits (bits 2 to 0 at addresses 30
Set the serial I/O mode select bits again.
Set the transmit enable bit (bit 0 at addresses 35
data in the UARTi transmit buffer register.
7–10
, 3D
) to "1" (transmission enabled) and set transmit
16
16
7751 Group User's Manual
pin synchronously
i
, 38
) to "000
" (Serial I/O disabled).
16
16
2
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