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SERIAL I/O
7.4 Clock asynchronous serial I/O (UART) mode
[When not using interrupts]
Checking state of UARTi transmit buffer register
UART0 transmit/receive control register 1 (Address 35
UART1 transmit/receive control register 1 (Address 3D
b7
Writing of next transmit data
UART0 transmit buffer register (Addresses 33
UART1 transmit buffer register (Addresses 3B
b15
Fig. 7.4.4 Writing data after start of transmission
7–42
b0
b0
1
Transmit buffer empty flag
0: Data present in transmit buffer register
1: No data present in transmit buffer register
(Writing of next transmit data is possible.)
16
16
b8
b7
Set transmit data here.
7751 Group User's Manual
)
16
)
16
Note :
This figure shows the bits and registers
required for processing.
Refer to Figures 7.4.6 and 7.4.7 about the
, 32
)
16
change of flag state and the occurrence
, 3A
)
16
timing of an interrupt request.
b0
[When using interrupts]
The UARTi transmit interrupt request
occurs when the UARTi transmit buffer
register becomes empty.
UARTi transmit interrupt
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