Renesas 7700 FAMILY User Manual page 59

INTERRUPTS
4.2 Interrupt sources
4.2 Interrupt sources
Table 4.2.1 lists the interrupt sources and the interrupt vector addresses. When programming, set the start
address of each interrupt routine at the vector addresses listed in this table.
Table 4.2.1 Interrupt sources and interrupt vector addresses
Interrupt source
Reset
Zero division
BRK instruction
____
DBC (Note)
Watchdog timer
____
INT
0
____
INT
1
____
INT
2
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
UART0 receive
UART0 transmit
UART1 receive
UART1 transmit
A-D conversion
____
Note: The DBC interrupt source is used exclusively for debugger control.
4–4
Interrupt vector address
High-order Low-order
address address
FFFF FFFE
16
FFFD FFFC
16
FFFB FFFA
16
FFF9 FFF8
16
FFF7 FFF6
16
FFF5 FFF4
16
FFF3 FFF2
16
FFF1 FFF0
16
FFEF FFEE
16
FFED FFEC
16
FFEB FFEA
16
FFE9 FFE8
16
FFE7 FFE6
16
FFE5 FFE4
16
FFE3 FFE2
16
FFE1 FFE0
16
FFDF FFDE
16
FFDD FFDC
16
FFDB FFDA
16
FFD9 FFD8
16
FFD7 FFD6
16
7751 Group User's Manual
Non-maskable
16
Non-maskable software interrupt
16
Non-maskable software interrupt
16
Not used usually
16
Non-maskable interrupt
16
External interrupt due to INT
16
External interrupt due to INT
16
External interrupt due to INT
16
Internal interrupt from Timer A0
16
Internal interrupt from Timer A1
16
Internal interrupt from Timer A2
16
Internal interrupt from Timer A3
16
Internal interrupt from Timer A4
16
Internal interrupt from Timer B0
16
Internal interrupt from Timer B1
16
Internal interrupt from Timer B2
16
Internal interrupt from UART0
16
16
Internal interrupt from UART1
16
16
Internal interrupt from A-D converter
16
Remarks
____
pin input signal
0
____
pin input signal
1
____
pin input signal
2