TIMER A
5.2 Block description
5.2.3 Timer Ai mode register
Figure 5.2.3 shows the structure of the timer Ai mode register. Operating mode select bits are used to
select the operating mode of timer Ai. Bits 2 to 7 have different functions according to the operating mode.
These bits are described in the paragraph of each operating mode.
b7
b6
b5
b4
b3
b2
Fig. 5.2.3 Structure of timer Ai mode register
5–6
b1
b0
Timer Ai mode register (i = 0 to 4) (Addresses 56
Bit
Operating mode select bits
0
1
2
These bits have different functions according to the operating mode.
3
4
5
6
7
7751 Group User's Manual
Bit name
b1 b0
0 0 : Timer mode
0 1 : Event counter mode
1 0 : One-shot pulse mode
1 1 : Pulse width modulation (PWM) mode
to 5A
)
16
16
Functions
At reset
RW
RW
0
RW
0
0
RW
0
RW
RW
0
0
RW
0
RW
0
RW