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TIMER A
5.5 One-shot pulse mode
5.5.1 Setting for one-shot pulse mode
Figures 5.5.2 and 5.5.3 show an initial setting example for registers relevant to the one-shot pulse mode.
Note that when using interrupts, set up to enable the interrupts. For details, refer to "Chapter 4. INTERRUPTS."
Selecting one-shot pulse mode and each function
b7
0
Setting "H" level width of one-shot pulse
(b15)
b7
Setting interrupt priority level
b7
Fig. 5.5.2 Initial setting example for registers relevant to one-shot pulse mode (1)
5–32
b0
1
1 0
Timer Ai mode register (i = 0 to 4) (Addresses 56
Selection of one-shot pulse mode
Trigger select bits
b4 b3
0 0 :
Writing "1" to one-shot start bit: Internal trigger
0 1 :
1 0 : Falling of TAi
pin's input signal: External trigger
IN
1 1 : Rising of TAi
pin's input signal: External trigger
IN
Count source select bits
b7 b6
0 0 : f
/f
2
4
0 1 : f
/f
16
32
1 0 : f
/f
64
128
1 1 : f
/f
512
1024
(b8)
b0
b7
Can be set to "0000
b0
Timer Ai interrupt control register (i = 0 to 4)
(Addresses 75
Interrupt priority level select bits
When using interrupts, set these bits to level 1-7.
When disabling interrupts, set these bits to level 0.
Continue to Figure 5.5.3 .
7751 Group User's Manual
16
Timer A0 register (Addresses 47
Timer A1 register (Addresses 49
b0
Timer A2 register (Addresses 4B
Timer A3 register (Addresses 4D
Timer A4 register (Addresses 4F
" to "FFFF
" (n).
16
16
n
Note.
"H" level width =
fi
fi: Frequency of count source
However, if n = "0000
", the counter does not
16
operate and the TAi
pin outputs "L" level. At this
OUT
time, no timer Ai interrupt request occurs.
to 79
)
16
16
to 5A
)
16
, 46
)
16
16
, 48
)
16
16
, 4A
)
16
16
, 4C
)
16
16
, 4E
)
16
16
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