Table of Contents
Advertisement
FLASH MEMORY VERSION
19.1 Parallel input/output mode
P8
3
P8
2
P8
1
P8
/CTS
/RTS
0
0
V
CC
P7
/AN
/AD
7
7
P7
P7
P7
P7
P7
P7
Fig. 19.1.3 Pin connection in parallel I/O mode
19–6
64 63 62 61 60 59 58 57
65
/TxD
0
66
/RxD
0
67
/CLK
0
68
0
69
V
CC
70
AV
CC
71
V
REF
72
AV
SS
73
V
SS
74
TRG
/AN
75
6
6
76
/AN
5
5
77
/AN
4
4
78
/AN
3
3
/AN
79
2
2
80
/AN
1
1
1
2
3
4
5
6
Outline : 80P6N-A
7751 Group User's Manual
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
M37751F6CFP
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
40
P2
/A
/D
4
20
4
39
P2
/A
/D
5
21
5
38
P2
/A
/D
6
22
6
37
P2
/A
/D
7
23
7
36
P3
/R/W
0
35
P3
/BHE
1
34
P3
/ALE
2
33
P3
/HLDA
3
V
32
V
SS
31
E
30
X
OUT
29
X
IN
28
RESET
V
27
CNV
SS
26
BYTE
25
P4
/HOLD
0
: Connect to oscillation circuit.
D
4
D
5
D
6
D
7
SS
PP
Advertisement
Table of Contents
