Renesas 7700 FAMILY User Manual page 131

TIMER B
6.1 Overview 6.2 Block description
Timer B consists of three counters (Timers B0 to B2) each equipped with a 16-bit reload function. Timers
B0 to B2 have identical functions and operate independently with each other.
6.1 Overview
Timer Bi (i = 0 to 2) has three operating modes listed below.
Timer mode
The timer counts an internally generated count source.
Event counter mode
The timer counts an external signal.
Pulse period/pulse width measurement mode
The timer measures an external signal's pulse period or pulse width.
6.2 Block description
Figure 6.2.1 shows the block diagram of Timer B. Explanation of registers relevant to Timer B is described
below.
Count source select bits
f /f
2 4
f /f
16 32
f /f
64 128
f /f
512 1024
Pulse period/Pulse width measurement mode
Polarity switching
TBi and edge pulse
IN
generating circuit
Fig. 6.2.1 Block diagram of Timer B
6–2
(Low-order 8 bits)
Timer mode
Event counter
mode
Count start bit
Counter reset circuit
7751 Group User's Manual
Data bus (odd)
Data bus (even)
(High-order 8 bits)
Timer Bi reload register (16)
Timer Bi counter (16)
Timer Bi
interrupt
request bit
Timer Bi
overflow
flag