Renesas 7700 FAMILY User Manual page 460

Appendix 3. Control registers
The register structure of each control register assignment in the SFR area are shown on the following pages.
The view of the register structure is described below.
b7 b6 b5 b4 b3 b2 b1
0
1
Blank : Set to "0" or "1" to according to the usage.
0 : Set to "0" at writing.
1 : Set to "1" at writing.
: Ignored depending on the specific mode or state. It may be either "0" or "1."
: Nothing is assigned.
2
0 : "0" immediately after a reset.
1 : "1" immediately after a reset.
Undefined : Undefined immediately after a reset.
3
RW : It is possible to read the bit state at reading. The written value becomes valid.
RO : It is possible to read the bit state at reading. The written value becomes invalid. Accordingly, the written
value may be "0" or "1."
WO : The written value becomes valid. It is impossible to read the bit state. The value is undefined at reading.
However, when ["0" is at reading"] is indicated in the "Function" or "Note" column, the bit is always "0" at
reading. (See 4 above.)
— : It is impossible to read the bit state. The value is undefined at reading.
However, when ["0" is at reading"] is indicated in the "Function" or "Note" column, the bit is always "0" at
reading. (See 4 above.)
The written value becomes invalid. Accordingly, the written value may be "0" or "1."
1
b0
XXX register (Address XX
Bit
Bit name
0
... select bit
... select bit
1
... flag
2
3 Fix this bit to "0."
4 This bit is ignored in ... mode.
7 to 5 Nothing is assigned.
7751 Group User's Manual
Appendix 3. Control registers
)
16
Functions
0 : ...
1 : ...
0 : ...
1 : ...
The value is "0" at reading.
0 : ...
1 : ...
APPENDIX
2
RW
At reset
0
RW
Undefined
WO
RO
0
0
RW
0
RW
Undefined –
4
3
20–9