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APPLICATIONS
17.1 Memory expansion
<When reading>
E
A
–A
1
A
D
–A
/
8
8
15
A
D
/
16
CE, S
OE
External memory
data output
<When writing>
E
A
–A
1
A
D
–A
/
8
8
A
D
, D
/
16
0
S
WE, WO
Fig. 17.1.32 Timing chart for ROM and SRAM expansion example (maximum model at high-speed
running)
17–36
7
D
/
15
0
AC573 (t
)
PHL
CE
7
D
/
15
15
–D
1
7
7751 Group User's Manual
104 (min.)
61.7 (min.)
A
5 (max.)
A
t
= 150
su
(P0A/P1A/P2A-P1D/P2D)
AC04 (t
)
PHL
S
BC32 (t
t
a
(S)
t
a
(OE)
t
t
a
a
(AD),
(CE)
104 (min.)
61.7 (min.)
A
35 (max.)
AC573 (t
)+AC04 (t
PHL
AC32 (t
A
A
22.2 (min.)
)
BC32 (t
PHL
PLH
15 (max.)
(Kit guaranteed)
D
≥ 30
t
su
(P1D/P2D-E)
A
D
22.2 (min.)
≥ 30
t
su
(D)
)
PHL
)
AC32 (t
PHL
PLH
(Unit: ns)
)
A
A
)
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