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9.2 Operation description
The operation of Watchdog timer is described below.
9.2.1 Basic operation
Watchdog timer starts down-counting from "FFF
When the Watchdog timer's most significant bit becomes "0" (counted 2048 times), the watchdog timer
interrupt request occurs. (Refer to Table 9.2.1.)
When the interrupt request occurs at above
The watchdog timer interrupt is a nonmaskable interrupt. When the watchdog timer interrupt request is
accepted, the processor interrupt priority level (IPL) is set to "111
Table 9.2.1 Occurrence interval of watchdog timer interrupt request
Watchdog timer
Clock source for peripheral
frequency
devices select bit = "0"
select bit
Count source
Wf
0
1024
Wf
1
64
Clock source for peripheral devices select bit : bit 2 at address 5F
f(X
) = 25 MHz
IN
Clock source for peripheral
devices select bit = "1"
Count source
Occurrence interval
Wf
83.89 ms
Wf
5.24 ms
7751 Group User's Manual
WATCHDOG TIMER
."
16
, a value "FFF
" is set to Watchdog timer.
16
."
2
Occurrence interval
41.94 ms
512
2.62 ms
32
16
9.2 Operation description
f(X
) = 40 MHz
IN
Clock source for peripheral
devices select bit = "0"
Count source
Occurrence interval
Wf
52.43 ms
1024
Wf
3.28 ms
64
9–5
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