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15.8 Memory expansion mode and microprocessor mode : When 2- φ access in low-speed running
Memory expansion mode and Microprocessor mode
: When 2- access in low-speed running
<Write>
X
IN
1
t
d(E–
E
Address output
A
–A
0
7
Address output
A
–A
8
15
(BYTE = "H")
Address/Data output
A
/D
–A
/D
8
8
15
15
(BYTE = "L")
Data input
D
–D
8
15
(BYTE = "L")
Address/Data output
A
/D
–A
/D
16
0
23
7
Data input
D
–D
0
7
t
d(E–ALE)
ALE output
BHE output
R/W output
Port Pi output
(i = 4–8)
Test conditions (
, E, P0–P3)
1
•V
= 5 V±10%
CC
•Output timing voltage : V
OL
•Data input
: V
IL
ELECTRICAL CHARACTERISTICS
t
t
t
t
t
w(L)
w(H)
r
f
c
t
w(
L)
t
w(
H)
t
)
d(E–
)
1
1
t
w(EL)
t
d(P0A–E)
Address
t
d(P1A–E)
Address
t
t
d(P1A–E)
d(E–P1Q)
Data
Address
t
t
d(P1A–ALE)
h(ALE–P1A)
t
d(P2A–E)
t
d(E–P2Q )
Data
Address
t
t
d(P2A–ALE)
h(ALE–P2A)
t
w (ALE)
t
d(ALE–E)
t
t
d(BH E–E)
h(E–BH E)
t
d(R / W–E)
t
d(E–Pi Q )
= 0.8 V, V
= 2.0 V
OH
= 0.8 V, V
= 2.5 V
IH
7751 Group User's Manual
t
h(E–P0A)
t
h(E–P1A)
t
h(E–P1Q)
t
h(E–P2Q )
t
h(E–R / W
)
Test conditions (P4–P8)
•V
= 5 V±10%
CC
• Input timing voltage
: V
= 1.0 V, V
IL
• Output timing voltage : V
= 0.8 V, V
OL
= 4.0 V
IH
= 2.0 V
OH
15–21
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