Renesas 7700 FAMILY User Manual page 156

Mitsubishi 16-bit single-chip microcomputer
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[Precautions when operating in pulse period/pulse width measurement mode]
1. The timer Bi interrupt request occurs by the following two causes:
Input of measured pulse's valid edge
Counter overflow
When the overflow is the cause of the interrupt request occurrence, the timer Bi overflow flag is set to
"1."
2. After reset, the timer Bi overflow flag is undefined. When writing to the timer Bi mode register with the
count start bit = "1," this flag can be cleared to "0" at the next count timing of the count source.
3. An undefined value is transferred to the reload register when the first valid edge is input after the counter
starts counting. In this case, the timer Bi interrupt request does not occur.
4. The counter value at start of counting is undefined. Accordingly, the timer Bi interrupt request may occur
by the overflow immediately after the counter starts counting.
5. If the contents of the measurement mode select bits are changed after the counter starts counting, the
timer Bi interrupt request bit is set to "1." When writing the same value which has been set yet to the
measurement mode select bits, the timer Bi interrupt request bit is not changed, that is, the bit retains
the state.
6. If the input signal to the TBi
measurement. We recommend to verify, by software, that the measurement values are within a constant
range.
6.5 Pulse period/pulse width measurement mode
pin is affected by noise, etc., the counter may not perform the exact
IN
7751 Group User's Manual
TIMER B
6–27

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