Renesas 7700 FAMILY User Manual page 272

CONNECTION WITH EXTERNAL DEVICES
(9) Clock φ
1
This signal has the same period as φ .
In the memory expansion mode, this signal is output externally by setting the clock φ
bit (bit 7 at address 5E
In the microprocessor mode, this signal is always output externally.
Note: Even in the single-chip mode, the clock φ
externally by setting the clock φ
mode.
Fig. 12.1.3 Output start timing of clock φ
b7 b6 b5 b4 b3 b2
0 0
Fig. 12.1.4 Structure of processor mode register
12.1 Signals required for accessing external devices
) to "1." Figure 12.1.3 shows the output start timing of clock φ
16
Writing "1" to clock
E
Clock (P4 )
1 2
Notes 1: The 1st cycle of clock
2: This applies when writing to clock
P4 pin is outputting "L" level.
2
b1 b0
Processor mode register 0 (Address 5E
Bit
Processor mode bits
0
1
Fix this bit to "0."
2
Software reset bit
3
Interrupt priority detection time
4
select bits
5
Fix this bit to "0."
6
Clock
1
7
Notes 1: While supplying the Vcc level to the CNVss pin, this bit becomes "1." (Fixed to "1.")
2: This bit is ignored in the microprocessor mode. (It may be either "0" or "1.")
: Bits 0 to 6 are not used for setting of clock
7751 Group User's Manual
can be output externally. This signal is output
1
output select bit to "1" just as in the memory expansion
1
output select bit
1
may be shortened; indicated by
1
output select bit while
1
1
)
16
Bit name
b1 b0
0 0 : Single-chip mode
0 1 : Memory expansion mode
1 0 : Microprocessor mode
1 1 : Not selected
The microcomputer is reset by
writing "1" to this bit. The value is
"0" at reading.
b5 b4
0 0 : 7 cycles of
0 1 : 4 cycles of
1 0 : 2 cycles of
1 1 : Not selected
0 : Clock
output select bit
(P4
(Note 2)
I/O port.)
1 : Clock
(P4
put pin.)
.
Functions
output disabled
1
functions as a programmable
2
output enabled
1
functions as a clock out-
2
1
output.
1
output select
1
1.
RW
At reset
0 RW
0
RW
(Note 1)
RW
0
0 WO
RW
0
RW
0
RW
0
0 RW
12–7