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APPLICATIONS
17.1 Memory expansion
<When reading>
E
A
–A
1
7
A
D
–A
D
/
/
8
8
15
15
A
D
/
16
0
CE, S
OE
External memory
data output
<When writing>
E
A
–A
1
7
A
D
–A
D
/
/
8
8
15
15
A
D
, D
–D
/
16
0
1
7
S
WE, WO
Fig. 17.1.30 Timing chart for ROM and SRAM expansion example (maximum model at low-speed
running)
17–34
19.6 (min.)
5 (max.)
A
t
su(P0A/P1A/P2A–P1D/P2D)
AC573 (t
)
PHL
AC04 (t
PHL
S
CE
AC32 (t
)
PHL
t
a
(AD),
19.6 (min.)
A
35 (max.)
AC573 (t
AC32 (t
7751 Group User's Manual
165.4 (min.)
A
= 173
)
t
a
(S)
t
a
(OE)
D
t
a
(CE)
165.4 (min.)
A
D
≥ 30
t
su
(D)
)+AC04 (t
)
PHL
PHL
)
PHL
A
A
25.6 (min.)
AC32 (t
)
PLH
15 (max.)
(Kit guaranteed)
≥ 30
t
su
(P1D/P2D-E)
A
A
25.6 (min.)
AC32 (t
)
PLH
(Unit: ns)
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