Renesas 7700 FAMILY User Manual page 180

[When not using interrupts]
Checking start of transmission
UART0 transmit interrupt control register (Address 71
UART1 transmit interrupt control register (Address 73
b7
Checking completion of transmission
UART0 transmit/receive control register 0 (Address 34
UART1 transmit/receive control register 0 (Address 3C
b7
Processing at completion of transmission
Fig. 7.3.3 Detection of transmission's completion
)
16
)
16
b0
Interrupt request bit
0: No interrupt request
1: Interrupt request
(Transmission has started.)
)
16
)
16
b0
Transmit register empty flag
0: During transmitting
1: Transmitting completed
7751 Group User's Manual
7.3 Clock synchronous serial I/O mode
[When using interrupts]
The UARTi transmit interrupt request
occurs when the transmission starts.
UARTi transmit interrupt
Note : This figure shows the bits and registers required
for processing.
Refer to Figure 7.3.5 about the change of flag state
and the occurrence timing of an interrupt request.
SERIAL I/O
7–23