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CONNECTION WITH EXTERNAL DEVICES
12.1 Signals required for accessing external devices
Table 12.1.1 Functions of pins P0 to P4 and E pin in memory expansion and microprocessor modes
External data bus
width
Pin
A
to A
7
0
(P0)
A
7
A
/D
to A
/D
15
15
8
8
(P1)
A
15
A
8
A
/D
to A
/D
23
7
16
0
(P2)
A
23
A
HLDA (P3
)
H L D A
3
ALE (P3
)
2
ALE
BHE (P3
)
1
BHE
R/W (P3
)
0
R / W
P4
to P4
P4
7
3
(P4
)
1
2
1
RDY (P4
)
1
R D Y
HOLD (P4
)
0
H O L D
E
E
Notes 1: In the memory expansion mode, this pin functions as a programmable I/O port and can be programmed as the clock
output pin by software.
2: This table shows the pins' functions. Refer to the following about the input/output timing of each signal:
"12.1.2 Operation of bus interface unit (BIU)"; "12.2 Bus cycle"; "12.3 Ready function"; "12.4 Hold function"
"Chapter 15. ELECTRICAL CHARACTERISTICS."
12–4
16 bits
(BYTE = "L")
— A
A
— A
0
7
0
/D
—
15
A
— A
D(odd)
15
8
/D
8
D(odd): Data at odd address
/D
—
7
A
— A
D(even)
23
16
/D
16
0
D(even): Data at even address
H L D A
ALE
BHE
R / W
— P4
P
7
3
P: Functions as a programmable I/O port.
1
R D Y
H O L D
7751 Group User's Manual
_
A
— A
15
8
A
/D
—
23
7
A
/D
16
0
(Note 1)
E
8 bits
(BYTE = "H")
A
— A
15
8
A
— A
D
23
16
D: Data
;
1
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