STMicroelectronics STM32WLEx Reference Manual page 38

Contents
36.6.12 DWT CoreSight peripheral identity register 4 (DWT_PIDR4) . . . . . . 1245
36.6.13 DWT CoreSight peripheral identity register 0 (DWT_PIDR0) . . . . . . 1245
36.6.14 DWT CoreSight peripheral identity register 1 (DWT_PIDR1) . . . . . . 1246
36.6.15 DWT CoreSight peripheral identity register 2 (DWT_PIDR2) . . . . . . 1246
36.6.16 DWT CoreSight peripheral identity register 3 (DWT_PIDR3) . . . . . . 1247
36.6.17 DWT CoreSight component identity register 0 (DWT_CIDR0) . . . . . 1247
36.6.18 DWT CoreSight peripheral identity register 1 (DWT_CIDR1) . . . . . . 1247
36.6.19 DWT CoreSight component identity register 2 (DWT_CIDR2) . . . . . 1248
36.6.20 DWT CoreSight component identity register 3 (DWT_CIDR3) . . . . . 1248
36.6.21 DWT register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1249
36.7 ROM table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1251
36.7.1
36.7.2
36.7.3
36.7.4
36.7.5
36.7.6
36.7.7
36.7.8
36.7.9
36.7.10 ROM CoreSight component identity register 3 (ROM_CIDR3) . . . . . 1257
36.7.11 ROM table register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1257
36.8 Breakpoint unit (FPB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1258
36.8.1
36.8.2
36.8.3
36.8.4
36.8.5
36.8.6
36.8.7
36.8.8
36.8.9
36.8.10 FPB CoreSight peripheral identity register 1 (FPB_CIDR1) . . . . . . . 1263
36.8.11 FPB CoreSight component identity register 2 (FPB_CIDR2) . . . . . . 1264
36.8.12 FPB CoreSight component identity register 3 (FPB_CIDR3) . . . . . . 1264
36.8.13 FPB register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1264
36.9 Instrumentation trace macrocell (ITM) . . . . . . . . . . . . . . . . . . . . . . . . . 1266
38/1306
ROM memory type register (ROM_MEMTYPER) . . . . . . . . . . . . . . . 1252
ROM CoreSight peripheral identity register 4 (ROM_PIDR4) . . . . . . 1253
ROM CoreSight peripheral identity register 0 (ROM_PIDR0) . . . . . . 1253
ROM CoreSight peripheral identity register 1 (ROM_PIDR1) . . . . . . 1254
ROM CoreSight peripheral identity register 2 (ROM_PIDR2) . . . . . . 1254
ROM CoreSight peripheral identity register 3 (ROM_PIDR3) . . . . . . 1255
ROM CoreSight component identity register 0 (ROM_CIDR0) . . . . . 1255
ROM CoreSight peripheral identity register 1 (ROM_CIDR1) . . . . . . 1256
ROM CoreSight component identity register 2 (ROM_CIDR2) . . . . . 1256
FPB control register (FPB_CTRLR) . . . . . . . . . . . . . . . . . . . . . . . . . . 1258
FPB remap register (FPB_REMAPR) . . . . . . . . . . . . . . . . . . . . . . . . 1259
FPB comparator register x (FPB_COMPxR) . . . . . . . . . . . . . . . . . . . 1259
FPB CoreSight peripheral identity register 4 (FPB_PIDR4) . . . . . . . 1260
FPB CoreSight peripheral identity register 0 (FPB_PIDR0) . . . . . . . 1261
FPB CoreSight peripheral identity register 1 (FPB_PIDR1) . . . . . . . 1261
FPB CoreSight peripheral identity register 2 (FPB_PIDR2) . . . . . . . 1262
FPB CoreSight peripheral identity register 3 (FPB_PIDR3) . . . . . . . 1262
FPB CoreSight component identity register 0 (FPB_CIDR0) . . . . . . 1263
RM0461 Rev 5
RM0461