Low-Power Sleep Mode (Lpsleep); Table 41. Sleep Mode - STMicroelectronics STM32WLEx Reference Manual

Power control (PWR)
Exit Sleep mode
The MCU exits the Sleep mode (see
Sleep mode
Mode entry
Mode exit
Wakeup latency
5.4.6

Low-power sleep mode (LPSleep)

Refer to the product datasheet for more details on voltage regulator and peripherals
operating conditions.
I/O states in LPSleep mode
In LPSleep mode, all I/O pins keep the same state as in Run mode.
Enter LPSleep mode
The LPSleep mode is entered from LPRun mode as described in
power mode, when the SLEEPDEEP bit in the Cortex system control register is clear.
Refer to
Exit LPSleep mode
The LPSleep mode is exited as described in
exiting the LPSleep mode by issuing an interrupt or an event, the MCU is in LPRun mode.
202/1306
WFI (wait for interrupt) or WFE (wait for event) while:
– SLEEPDEEP = 0
– No interrupt (for WFI) or event (for WFE) is pending
Refer to the Cortex system control register.
On return from ISR while:
– SLEEPDEEP = 0 and
– SLEEPONEXIT = 1
– No interrupt is pending
Refer to the Cortex system control register.
If WFI or return from ISR was used for entry
Interrupt: refer to
If WFE was used for entry and SEVONPEND = 0:
Wakeup event: refer to
If WFE was used for entry and SEVONPEND = 1:
Interrupt even when disabled in NVIC: refer to
wakeup event: refer to
None
Table 42 for details on how to enter the LPSleep mode.
Table 41) as indicated in

Table 41. Sleep mode

Description
Table 78: Vector table
Table 81: Wakeup interrupts
Table 81: Wakeup interrupts
Section 5.4.4: Exit low-power
RM0461 Rev 5
RM0461
Exit low-power mode.
Table 78: Vector table
Section 5.4.3: Enter low-
mode. When
or