Table 36. Low-Power Mode Summary - STMicroelectronics STM32WLEx Reference Manual

Power control (PWR)
All clocks in the V
LSI and LSE can be kept running.
Th RTC can remain active (Standby mode with RTC, Standby mode without RTC). The
sub-GHz radio and the PVD may also remain active when enabled independent from
the CPU. In Standby mode, the PVD selects its lowest level.
The system clock, when exiting Standby modes, is MSI at 4 MHz.
•
Shutdown
stopped. PLL, MSI, HSI16, LSI and HSE32 are disabled. LSE can be kept running. The
system clock when exiting the Shutdown mode, is MSI at 4 MHz. In this mode, the
supply voltage monitoring is disabled and the product behavior is not guaranteed in
case of a power voltage drop.
In addition, the power consumption in Run mode can be reduced by slowing down the
system clocks, and/or by gating the clocks to the APB and AHB peripherals when they are
unused.
The system operation mode depends on the CPU sub-system operating mode. The system
only enters a low-power mode when the CPU allows it to do so.
The system low-power mode to enter depends on the allowed mode selected by the CPU in
LPMS[2:0] bits in
Mode name Entry
WFI or return
Sleep
from ISR
(Sleep-now or
Sleep-on-exit)
WFE
LPRun Set LPR bit
Set LPR bit +
WFI or return
from ISR
LPSleep
Set LPR bit +
WFE
194/1306
powered off.
domain are stopped. PLL, MSI, HSI16 and HSE32 are disabled.
CORE
mode: V domain is powered off. All clocks in the V
CORE
PWR control register 1

Table 36. Low-power mode summary

Wakeup
(1)
source
Any interrupt
Wakeup event
Clear LPR bit
Any interrupt
Wakeup event
(PWR_CR1).
Wakeup
system clock
Same as before
entering Sleep mode
Same as LPRun
clock
Same as before
entering LPSleep
mode
RM0461 Rev 5
domain are
CORE
Effect on clocks
CPU clock OFF
No effect on other clocks
or analog clock sources
None
CPU clock OFF
No effect on other clocks
or analog clock sources
RM0461
Voltage
regulators
MR LPR
ON ON
OFF ON
OFF ON
OFF ON