Reset And Clock Control (Rcc); Reset; Power Reset; System Reset - STMicroelectronics STM32WLEx Reference Manual

Reset and clock control (RCC)

6 Reset and clock control (RCC)
6.1

Reset

There are three types of reset, defined as system reset, power reset and Backup domain
reset.
6.1.1

Power reset

A power reset is generated when one of the following events occurs:
•
a Brownout reset (BOR)
•
when exiting from Standby mode
•
when exiting from Shutdown mode
A Brownout reset, including power-on or power-down reset (POR/PDR), sets all registers to
their reset values except the Backup domain.
When exiting Standby mode, all registers in the V
Registers outside the V
control) are not impacted.
When exiting Shutdown mode, a Brownout reset is generated, resetting all registers except
those in the Backup domain.
6.1.2

System reset

A system reset sets all registers to their reset values unless otherwise specified in the
register description.
A system reset is generated when one of the following events occurs:
•
a low level on the NRST pin (external reset)
• window watchdog event (WWDG reset)
•
independent watchdog event (IWDG reset)
•
a software reset (SW reset) (see
•
low-power mode security reset (see
•
option byte loader reset (see
•
a Brownout reset
•
an illegal sub-GHz radio access (sub-GHz radio protocol error reset) (only valid for non
LoRa devices, STM32WLE4xx)
The reset source can be identified by checking the reset flags in the control/status register,
RCC_CSR (see
These sources act on the NRST pin, that is always kept low during the delay phase. The
CPU RESET service routine vector is selected via the BOOT0 and BOOT1.
The system reset signal provided to the device is output on the NRST pin. The pulse
generator guarantees a minimum reset pulse duration of 20 µs for each internal reset
source. In case of an external reset, the reset pulse is generated while the NRST pin is
asserted low.
230/1306
domain (RTC, WKUP, IWDG and Standby/Shutdown modes
CORE
Option byte loader
Section 6.4.31: RCC control/status register
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domain are set to their reset value.
CORE
Software reset)
Low-power mode security
reset)
reset)
(RCC_CSR)).
RM0461