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General-purpose I/Os (GPIO)
8.4.31
GPIOH alternate function low register (GPIOH_AFRL)
Address offset: 0x1C20
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
15
14
13
AFSEL3[3:0]
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:12 AFSEL3[3:0]: Port PH3 alternate function selection
These bits are written by software to configure alternate function I/Os.
0x0: AF0 selected
0x1: AF1 selected
0x2: AF2 selected
...
0xE: AF14 selected
0xF: AF15 selected
Bits 11:0 Reserved, must be kept at reset value.
8.4.32
GPIOH bit reset register (GPIOH_BRR)
Address offset: 0x1C28
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Bits 31:4 Reserved, must be kept at reset value.
Bit 3 BR3: Port PH3 reset output data bit [3] in GPIOH_ODR
Bits 2:0 Reserved, must be kept at reset value.
336/1306
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
rw
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
Res.
This bit is read clear-write 1. A read to this bit returns the value 0.
0: No action on the corresponding GPIOH_ODR.OD3
1: Resets the corresponding GPIOH_ODR.OD3.
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
RM0461 Rev 5
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
Res.
Res.
Res.
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
Res.
BR3
Res.
rc_w1
RM0461
17
16
Res.
Res.
1
0
Res.
Res.
17
16
Res.
Res.
1
0
Res.
Res.
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