STMicroelectronics STM32WLEx Reference Manual page 870

Low-power timer (LPTIM)
Table 191. LPTIM register map and reset values (continued)
Offset Register name
LPTIM3_OR
0x020
Reset value
LPTIM_RCR
0x028
Reset value
1. If LPTIM does not support encoder mode feature, this bit is reserved. Refer to
implementation.
Refer to
870/1306
Section 2.4 on page 62 for the register boundary addresses.
RM0461 Rev 5
REP[7:0]
0 0 0 0 0 0 0 0
Section 26.3: LPTIM
RM0461
0 0