Figure 60. Behavior With Wait = 0, Autoff = 1 - STMicroelectronics STM32WLEx Reference Manual

Analog-to-digital converter (ADC)
TRGx
EOC
EOS
ADC_DR Read
access
RDY
ADC state
ADC_DR
by S/W by H/W
triggered
1. EXTSEL = TRGx, EXTEN = 01 (rising edge), CONT = x, ADSTART = 1, CHSEL = 0xF, SCANDIR = 0, WAIT = 1,
AUTOFF = 1
TRGx
EOC
EOS
ADC_DR Read
access
RDY Startup
ADC state
ADC_DR
by S/W
triggered
1. EXTSEL = TRGx, EXTEN = 01 (rising edge), CONT = x, ADSTART = 1, CHSEL = 0xF, SCANDIR = 0, WAIT = 1,
AUTOFF = 1
16.7 Analog window watchdogs
The three AWD analog watchdogs monitor whether some channels remain within a
configured voltage range (window).
452/1306

Figure 60. Behavior with WAIT = 0, AUTOFF = 1

Startup CH1 CH2 CH3
D1 D2
Figure 61. Behavior with WAIT = 1, AUTOFF = 1
DLY
CH1 OFF Startup
D1
by H/W
CH4
D3
D4
DLY
CH2 Startup CH3
D2
RM0461 Rev 5
OFF
DLY
OFF
Startup
D3
RM0461
Startup
MSv30345V2
DLY
CH1 CH2
D4
MSv30346V2