Table 117. Rng Internal Input/Output Signals; Figure 84. Rng Block Diagram - STMicroelectronics STM32WLEx Reference Manual

RM0461
20.3 RNG functional description
20.3.1 RNG block diagram
Figure 84
rng_hclk
rng_clk
rng_itamp_out
20.3.2 RNG internal signals
Table 117
at the STM32 product level (on pads).
Signal name
shows the RNG block diagram.

Figure 84. RNG block diagram

rng_it
AHB
interface
AHB clock domain
RNG clock domain
describes a list of useful-to-know internal signals available at the RNG level, not

Table 117. RNG internal input/output signals

Signal type
rng_it Digital output
rng_hclk Digital input
rng_clk Digital input
True random number generator (RNG)
Banked Registers CONDRST
RNG_CR
RNG_DR
RNG_SR
Fault detection
Clock checker
Health tests
en_osc
RNG global interrupt request
AHB clock
RNG dedicated clock, asynchronous to rng_hclk
RM0461 Rev 5
True RNG
Conditioning logic
1-bit
Post-processing (optional)
Sampling (x N) + XOR
Analog Analog Analog
...
noise noise noise
source 1 source 2 source N
Analog noise source
Description
MSv42098V3
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