STMicroelectronics STM32WLEx Reference Manual page 327

RM0461
8.4.16 GPIOC input data register (GPIOC_IDR)
Address offset: 0x0810
Reset value: 0x0000 XXXX
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
ID15 ID14 ID13 Res.
r r r
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:13 IDy: Port PCy input data bit (y = 15 to 13)
Bits 12:7 Reserved, must be kept at reset value.
Bits 6:0 IDy: Port PCy input data bit (y = 6 to 0)
8.4.17 GPIOC output data register (GPIOC_ODR)
Address offset: 0x0814
Reset value: 0x0000 0000
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
OD15 OD14 OD13 Res.
rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:13 ODy: Port PCy output data bit (y = 15 to 13)
Note: For atomic bit set/reset, OD bits can be individually set and/or reset by writing to the
Bits 12:7 Reserved, must be kept at reset value.
Bits 6:0 ODy: Port PCy output data bit (y = 6 to 0)
27 26 25
Res. Res. Res.
11 10 9
Res. Res. Res.
These bits are read-only. They contain the input value of the corresponding I/O port.
27 26 25
Res. Res. Res.
11 10 9
Res. Res. Res.
These bits can be read and written by software.
GPIOC_BSRR and GPIOC_BRR registers.
24 23 22
Res. Res. Res. Res.
8 7 6
Res. Res. ID6 ID5
r
24 23 22 21
Res. Res. Res. Res.
8 7 6
Res. Res. OD6 OD5
rw
RM0461 Rev 5
General-purpose I/Os (GPIO)
21 20 19 18
Res. Res. Res.
5 4 3 2
ID4 ID3 ID2
r r r r
20 19 18
Res. Res. Res.
5 4 3 2
OD4 OD3 OD2
rw rw rw rw
17 16
Res. Res.
1 0
ID1 ID0
r r
17 16
Res. Res.
1 0
OD1 OD0
rw rw
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