Table 79. Exti Pin Overview; Table 80. Evg Pin Overview; Figure 40. Exti Block Diagram - STMicroelectronics STM32WLEx Reference Manual

Extended interrupts and event controller (EXTI)
The masking block provides the event input distribution to the different wakeup, interrupt
and event outputs, and the masking of these.
AHB interface
hclk
Wakeup
Direct event(x) or
configurable event(y)
Interrupt
Direct event(x)
1) it_exti_per(y) only available for configurable events (y)
Pin name I/O
AHB interface I/O
hclk I
Configurable
I
event(y)
Direct event(x) I
it_exti_per (y) O
c_evt_exti O
c_evt_rst I
sys_wakeup O
c_wakeup O
Pin name
c_fclk
c_evt_in
c_event
c_evt_rst
404/1306

Figure 40. EXTI block diagram

Registers
Masking
Event
Events
trigger
EXTI

Table 79. EXTI pin overview

EXTI register bus interface
AHB bus clock and EXTI system clock
Asynchronous wakeup events from peripherals which do not have an associated interrupt
and flag in the peripheral
Synchronous and asynchronous wakeup events from peripherals which have an
associated interrupt and flag in the peripheral
Interrupts to the CPU associated with the configurable event (y)
High-level sensitive event output for the CPU, synchronous to hclk
Asynchronous reset input to clear c_evt_exti
Asynchronous system wakeup request to PWR for ck_sys and hclk
Wakeup request to PWR for the CPU, synchronous to hclk

Table 80. EVG pin overview

I/O
I CPU free running clock
I High-level sensitive events input from EXTI, asynchronous to the CPU clock
O Event pulse, synchronous to the CPU clock
O Event reset signal, synchronous to the CPU clock
sys_wakeup
c_wakeup
(1)
it_exti_per(y)
c_evt_exti
c_evt_rst
EVG
Description
Description
RM0461 Rev 5
c_event
Pulse
rxev
nvic(x)
c_fclk
nvic(y)
RM0461
PWR
CPU
MSv60759V1