STMicroelectronics STM32WLEx Reference Manual page 464

Analog-to-digital converter (ADC)
Analog watchdog 2 status bit is set
Analog watchdog 3 status bit is set
Channel Configuration Ready
End of sampling phase
Overrun
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Table 97. ADC interrupts (continued)
Interrupt event
RM0461 Rev 5
Event flag Enable control bit
AWD2 AWD2IE
AWD3 AWD3IE
CCRDY CCRDYIE
EOSMP EOSMPIE
OVR OVRIE
RM0461