Backup Domain Reset; Figure 20. Simplified Diagram Of The Reset Circuit - STMicroelectronics STM32WLEx Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0461
In case on an internal reset, the internal pull-up R
power consumption through the pull-up resistor.
External
reset
NRST
1) The sub-GHz radio protocol error reset is available in non LoRa devices only, STM32WLE4xx.
Software reset
The SYSRESETREQ bit in CPU application interrupt and reset control register may be set
to force a software reset on the device (refer to the programming manual STM32 Cortex
M4 MCUs and MPUs (PM0214)).
Low-power mode security reset
To prevent that critical applications mistakenly enter a low-power mode, two low-power
mode security resets are available.
If enabled in option bytes, the resets are generated in the following conditions:
Entering Standby mode: this type of reset is enabled by resetting nRST_STDBY bit in
user option bytes. In this case, whenever a Standby mode entry sequence is
successfully executed, the device is reset instead of entering Standby mode.
Entering Stop mode: this type of reset is enabled by resetting nRST_STOP bit in user
option bytes. In this case, whenever a Stop mode entry sequence is successfully
executed, the device is reset instead of entering Stop mode.
Entering Shutdown mode: this type of reset is enabled by resetting nRST_SHDW bit in
user option bytes. In this case, whenever a Shutdown mode entry sequence is
successfully executed, the device is reset instead of entering Shutdown mode.
For further information on the user option bytes, refer to
description.
Option byte loader reset
The option byte loader reset is generated when the OBL_LAUNCH bit is set in the
FLASH_CR register. This bit is used to launch the option byte loading by software.
6.1.3

Backup domain reset

The Backup domain has two specific resets.

Figure 20. Simplified diagram of the reset circuit

V
DD
R
PU
generator
(min 20 μs)
RM0461 Rev 5
Reset and clock control (RCC)
is deactivated in order to save the
PU
Filter
Pulse
Section 3.4.1: Option bytes
System reset
WWDG reset
IWDG reset
(1)
Radio protocol error reset
CPU software reset
Low-power manager reset
Option byte loader reset
BOR reset
MSv62603V1
®
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