STMicroelectronics STM32WLEx Reference Manual page 542

True random number generator (RNG)
20.7.3 RNG data register (RNG_DR)
Address offset: 0x008
Reset value: 0x0000 0000
The RNG_DR register is a read-only register that delivers a 32-bit random value when read.
The content of this register is valid when DRDY = 1 and value is not 0x0, even if
RNGEN = 0.
31 30 29
r r r
15 14 13
r r r
Bits 31:0 RNDATA[31:0]: Random data
20.7.4 RNG health test control register (RNG_HTCR)
Address offset: 0x010
Reset value: 0x0000 5A4E
Writing in RNG_HTCR is taken into account only if CONDRST bit is set, and CONFIGLOCK
bit is cleared in RNG_CR. Writing to this register is ignored if CONFIGLOCK=1.
31 30 29
rw rw rw
15 14 13
rw rw rw
Bits 31:0 HTCFG[31:0]: health test configuration
Note: The RNG behavior, including the read to this register, is not guaranteed if a different
542/1306
28 27 26 25
r r r r
12 11 10 9
r r r r
32-bit random data which are valid when DRDY = 1. When DRDY = 0 RNDATA value
is zero.
When DRDY is set,
it is recommended to always verify that RNG_DR is different from
zero. Because when it is the case a seed error occurred between RNG_SR polling and
RND_DR output reading (rare event).
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw
This configuration is used by RNG to configure the health tests. See
entropy source validation
value from the recommended value is written.
When reading or writing this register magic number; 0x17590ABC must be written
immediately before to RNG_HTCR register.
24 23 22
RNDATA[31:16]
r r r
8 7 6
RNDATA[15:0]
r r r
24 23 22
HTCFG[31:16]
rw rw rw
8 7 6
HTCFG[15:0]
rw rw rw
for the recommended value.
RM0461 Rev 5
21 20 19 18
r r r r
5 4 3 2
r r r r
21 20 19 18
rw rw rw rw
5 4 3 2
rw rw rw rw
Section 20.6: RNG
RM0461
17 16
r r
1 0
r r
17 16
rw rw
1 0
rw rw