RM0461
Bit 18 ITAMP3MF: Internal tamper 3 interrupt masked flag
Bit 17 Reserved, must be kept at reset value.
Bit 16 Reserved, must be kept at reset value.
Bits 15:3 Reserved, must be kept at reset value.
Bit 2 TAMP3MF: TAMP3 interrupt masked flag
Bit 1 TAMP2MF: TAMP2 interrupt masked flag
Bit 0 TAMP1MF: TAMP1 interrupt masked flag
31.6.8
TAMP status clear register (TAMP_SCR)
Address offset: 0x3C
System reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:24 Reserved, must be kept at reset value.
Bit 23 CITAMP8F: Clear ITAMP8 detection flag
Bit 22 Reserved, must be kept at reset value.
Bit 21 CITAMP6F: Clear ITAMP6 detection flag
Bit 20 CITAMP5F: Clear ITAMP5 detection flag
Bit 19 Reserved, must be kept at reset value.
Bit 18 CITAMP3F: Clear ITAMP3 detection flag
Bit 17 Reserved, must be kept at reset value.
Bit 16 Reserved, must be kept at reset value.
Bits 15:3 Reserved, must be kept at reset value.
This flag is set by hardware when the internal tamper 3 interrupt is raised.
This flag is set by hardware when the tamper 3 interrupt is raised.
This flag is set by hardware when the tamper 2 interrupt is raised.
This flag is set by hardware when the tamper 1 interrupt is raised.
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
Writing 1 in this bit clears the ITAMP8F bit in the TAMP_SR register.
Writing 1 in this bit clears the ITAMP6F bit in the TAMP_SR register.
Writing 1 in this bit clears the ITAMP5F bit in the TAMP_SR register.
Writing 1 in this bit clears the ITAMP3F bit in the TAMP_SR register.
Tamper and backup registers (TAMP)
24
23
22
C
Res.
ITAMP
Res.
ITAMP
8F
w
8
7
6
Res.
Res.
Res.
RM0461 Rev 5
21
20
19
18
C
C
C
ITAMP
Res.
ITAMP
6F
5F
3F
w
w
w
5
4
3
2
CTAMP
Res.
Res.
Res.
3F
w
17
16
Res.
Res.
1
0
CTAMP
CTAMP
2F
1F
w
w
943/1306
946
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