Table 56. Hsem Internal Input/Output Signals; Figure 27. Hsem Block Diagram - STMicroelectronics STM32WLEx Reference Manual

RM0461
7.3 Functional description
7.3.1 HSEM block diagram
As shown in
•
the semaphore block containing the semaphore status and IDs
•
the semaphore interface block providing AHB access to the semaphore via the
HSEM_Rx and HSEM_RLRx registers
•
the interrupt interface block providing control for the interrupts via HSEM_ISR,
HSEM_IER, HSEM_MISR, and HSEM_ICR registers.
hsem_hclk
7.3.2 HSEM internal signals
Signal name
BusMasterID
hsem_int_it
7.3.3 HSEM lock procedures
There are two lock procedures, namely 2-step (write) lock and 1-step (read) lock. The two
procedures can be used concurrently.
Figure 27, the HSEM is based on three sub-blocks:

Figure 27. HSEM block diagram

Bus master ID
Semaphore block
Semaphore 0
Semaphore 1
Semaphore x

Table 56. HSEM internal input/output signals

AHB bus Digital input/output
HSEM
Semaphore interface
1
Sem_Ints
HSEM_R0
HSEM_RLR0
1
Sem_Ints
HSEM_R1
HSEM_RLR1
1
Sem_Ints
HSEM_Rx
HSEM_RLRx
Signal type
AHB register access bus
Digital input AHB bus master ID
Digital output Interrupt line
RM0461 Rev 5
Hardware semaphore (HSEM)
Interrupt interface
HSEM_ICR
Description
hsem_int_it
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