STMicroelectronics STM32WLEx Reference Manual page 60

Memory and bus architecture
Boot mode selection
x 0
1 x 1
1
0
x x
x 1
1 x 0
0
0
x x
Values on BOOT0 and BOOT1 are latched after a reset. It is up to the user to provide the
correct value for the required boot mode.
BOOT0 and BOOT1 are also re-sampled when exiting Standby mode. Consequently they
must be kept in the required boot mode. After the startup delay, the CPU fetches the top-of-
stack from address 0x0000 0000, then starts code execution from the boot memory at
0x0000 0004.
Depending on the selected boot mode, main flash memory, system flash memory and
SRAM1 are accessible as follows:
•
Boot from main flash memory
The main flash memory is aliased in the CPU boot memory space at address 0x0000
0000 and is also still accessible from its physical address 0x0800 0000. In other words,
the flash memory contents can be accessed starting from address 0x0000 0000 or
0x0800 0000.
•
Boot from system flash memory
The system flash memory is aliased in the CPU boot memory space at address 0x0000
0000 and is also still accessible from its physical address 0x1FFF 0000.
•
Boot from SRAM memory
The SRAM memory is aliased in the CPU boot memory space at address 0x0000 0000
and is also still accessible from its physical address 0x2000 0000.
CPU SRAM physical remap
Following CPU boot, the application software can modify the memory map at address
0x0000 0000. This modification is performed by programming the SYSCFG memory remap
register (SYSCFG_MEMRMP) in the SYSCFG controller.
60/1306
Table 1. Device boot mode (continued)
0
1
0
x
1
Yes
0
1
0
x
1
RM0461 Rev 5
CPU aliasing space
User Flash boot
System Flash boot
System Flash boot
SRAM1 boot
User Flash boot
User Flash boot
System Flash boot
System Flash boot
SRAM1 boot
User Flash boot
RM0461