Table 191. Lptim Register Map And Reset Values - STMicroelectronics STM32WLEx Reference Manual

RM0461
26.7.13 LPTIM register map
The following table summarizes the LPTIM registers.
Offset Register name
LPTIM_ISR
0x000
Reset value
LPTIM_ICR
0x004
Reset value
LPTIM_IER
0x008
Reset value
LPTIM_CFGR
0x00C
Reset value
LPTIM_CR
0x010
Reset value
LPTIM_CMP
0x014
Reset value
LPTIM_ARR
0x018
Reset value
LPTIM_CNT
0x01C
Reset value
LPTIM1_OR
0x020
Reset value
LPTIM2_OR
0x020
Reset value

Table 191. LPTIM register map and reset values

0 0 0 0 0 0 0 0
RM0461 Rev 5
Low-power timer (LPTIM)
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
CMP[15:0]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ARR[15:0]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
CNT[15:0]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0
0 0
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