Figure 185. Counter Timing Diagram, Internal Clock Divided By 4; Figure 186. Counter Timing Diagram, Internal Clock Divided By N - STMicroelectronics STM32WLEx Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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General-purpose timer (TIM2)
RM0461

Figure 185. Counter timing diagram, internal clock divided by 4

CK_PSC
CNT_EN
Timerclock = CK_CNT
Counter register
0001
0000
0000
0001
Counter underflow
Update event (UEV)
Update interrupt flag
(UIF)
MS31186V1

Figure 186. Counter timing diagram, internal clock divided by N

CK_PSC
Timerclock = CK_CNT
20
1F
00
36
Counter register
Counter underflow
Update event (UEV)
Update interrupt flag
(UIF)
MS31187V1
728/1306
RM0461 Rev 5

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