RM0461
Offset
Register
DMA_CCR5
0x058
Reset value
DMA_CNDTR5
0x05C
Reset value
DMA_CPAR5
0x060
Reset value
DMA_CMAR5
0x064
Reset value
0x068
Reserved
DMA_CCR6
0x06C
Reset value
DMA_CNDTR6
0x070
Reset value
DMA_CPAR6
0x074
Reset value
DMA_CMAR6
0x078
Reset value
0x07C
Reserved
DMA_CCR7
0x080
Reset value
DMA_CNDTR7
0x084
Reset value
DMA_CPAR7
0x088
Reset value
DMA_CMAR7
0x08C
Reset value
Refer to
Table 70. DMA register map and reset values (continued)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Section 2.4
for the register boundary addresses.
Direct memory access controller (DMA)
0
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved.
0
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
Reserved.
0
0
0
0
PA[31:0]
0
0
0
0
0
0
0
0
0
MA[31:0]
0
0
0
0
0
0
0
0
0
RM0461 Rev 5
0
0
0
0
0
0
0
0
0
NDT[17:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NDT[17:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NDT[17:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0 0
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