STMicroelectronics STM32WLEx Reference Manual page 220

Power control (PWR)
Bit 7 FLASHRDY: Flash memory ready
Bit 6 REGMRS: Main regulator status
Bit 5 RFEOLF: Radio end-of-life flag
Bit 4 LDORDY: LDO ready flag
Bit 3 SMPSRDY: SMPS ready flag
Bit 2 RFBUSYMS: Radio busy masked signal status
Bit 1 RFBUSYS: Radio busy signal status
Bit 0 Reserved, must be kept at reset value.
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This bit is set by hardware when the flash memory can be accessed by software after a
software controlled flash power down (in LPRun mode). This bit is cleared by hardware when
the flash memory is powered down.
0: Flash memory not ready to be accessed
1: Flash memory ready to be accessed
This bit is set by hardware when the main regulator is supplied by the LDO or SMPS when
enabled. When this bit is cleared the main regulator is directly supplied from V
0: main regulator supplied directly from V
1: main regulator supplied through LDO or SMPS
When enabled by RFEOLEBN, this bit indicates that the supply voltage reached the radio
end-of-life operating low level.
0: Supply voltage above radio end-of-life operating low level
1: Supply voltage below radio end-of-life operating low level
This bit indicates that the LDO is ready.
0: LDO not ready or off
1: LDO ready
This bit indicates that the SMPS step-down converter is ready.
0: SMPS step-down converter not ready or off
1: SMPS step-down converter ready
This bit indicates the actual status of the radio busy masked signal.
0: radio busy masked signal low (not busy)
1: radio busy masked signal high (busy)
This bit indicates the actual status of the radio busy signal.
0: radio busy signal low (not busy)
1: radio busy signal high (busy)
DD
RM0461 Rev 5
RM0461
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DD