Figure 283. Transfer Sequence Flow For I2C Master Receiver For N >255 Bytes - STMicroelectronics STM32WLEx Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Inter-integrated circuit (I2C) interface
Figure 283. Transfer sequence flow for I2C master receiver for N >255 bytes
978/1306
Set I2C_CR2.START with
slave addess NBYTES ...
End
Master reception
Master initialization
NBYTES = 0xFF; N=N-255
RELOAD =1
Configure slave address
Set I2C_CR2.START
I2C_ISR.RXNE
=1?
Yes
Read I2C_RXDR
NBYTES
received?
Yes
Yes
I2C_ISR.TC =
1?
No
No
I2C_ISR.TCR
= 1?
Yes
IF N< 256
NBYTES =N; N=0;RELOAD=0
AUTOEND=0 for RESTART; 1 for STOP
ELSE
NBYTES =0xFF;N=N-255
RELOAD=1
RM0461 Rev 5
RM0461
No
No
MS19864V2

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