STMicroelectronics STM32WLEx Reference Manual page 380

Direct memory access controller (DMA)
Offset Register
DMA_IFCR
0x004
Reset value
DMA_CCR1
0x008
Reset value
DMA_CNDTR1
0x00C
Reset value
DMA_CPAR1
0x010
Reset value
DMA_CMAR1
0x014
Reset value
0x018 Reserved
DMA_CCR2
0x01C
Reset value
DMA_CNDTR2
0x020
Reset value
DMA_CPAR2
0x024
Reset value
DMA_CMAR2
0x028
Reset value
0x02C Reserved
DMA_CCR3
0x030
Reset value
DMA_CNDTR3
0x034
Reset value
DMA_CPAR3
0x038
Reset value
DMA_CMAR3
0x03C
Reset value
0x040 Reserved
DMA_CCR4
0x044
Reset value
DMA_CNDTR4
0x048
Reset value
DMA_CPAR4
0x04C
Reset value
DMA_CMAR4
0x050
Reset value
0x054 Reserved
380/1306
Table 70. DMA register map and reset values (continued)
0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0
0 0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
Reserved.
0
0 0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
Reserved.
0
0 0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
Reserved.
0
0 0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
Reserved.
RM0461 Rev 5
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
NDT[17:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
NDT[17:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
NDT[17:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
NDT[17:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
RM0461
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0