Figure 30. Basic Structure Of A Standard I/O Port Bit - STMicroelectronics STM32WLEx Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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General-purpose I/Os (GPIO)
GPIOx_BSRR and GPIOx_BRR registers allow atomic read/modify accesses to any of the
GPIOx_ODR registers. In this way, there is no risk of an IRQ occurring between the read
and the modify access.
Figure 30
bit.
Table 59
Analog
To on-chip
peripheral
Alternate function input
Read
Write
Read/write
From on-chip
Alternate function output
peripheral
310/1306
and
Figure 31
show the basic structure of a standard and a 5V-tolerant I/O port
gives the possible port bit configurations.

Figure 30. Basic structure of a standard I/O port bit

Input driver
Output driver
on/off
trigger
V
DDIOx
P-MOS
Output
control
N-MOS
V
SS
Push-pull,
open-drain or
disabled
RM0461 Rev 5
RM0461
V
DDIOx
V
DDIOx
Protection
on/off
diode
Pull
up
I/O pin
on/off
Protection
Pull
down
diode
V
SS
V
SS
Analog
MS31476V1

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