Flash Interrupts; Flash Registers; Flash Access Control Register (Flash_Acr); Table 16. Flash Interrupt Requests - STMicroelectronics STM32WLEx Reference Manual

Embedded flash memory (FLASH)
3.7

FLASH interrupts

Interrupt event
End of operation
Operation error
Readout protection error
Write protection error
Size error
Programming sequential error
Programming alignment error
Programming sequence error
Data miss during fast programming error
Fast programming error
ECC error correction
ECC double-error (NMI)
1. EOP is set only if EOPIE is set.
2. OPERR is set only if ERRIE is set.
3.8

FLASH registers

3.8.1

FLASH access control register (FLASH_ACR)

Address offset: 0x000
Reset value: 0x0000 0600
31 30 29
Res. Res. Res. Res.
15 14 13
PES Res. Res. DCRST ICRST
rw
92/1306

Table 16. Flash interrupt requests

28 27 26 25
Res. Res. Res.
12 11 10 9
DCEN ICEN
rw rw rw rw
Event flag/interrupt
Event flag
clearing method
(1)
EOP Write EOP=1
(2)
OPERR Write OPERR=1
RDERR Write RDERR=1
WRPERR Write WRPERR=1
SIZERR Write SIZERR=1
PROGERR Write PROGERR=1
PGAERR Write PGAERR=1
PGSERR Write PGSERR=1
MISSERR Write MISSERR=1
FASTERR Write FASTERR=1
ECCC Write ECCC=1
ECCD Write ECCD=1
24 23 22
Res. Res. Res.
8 7 6
PRFTEN Res. Res.
rw
RM0461 Rev 5
Interrupt enable
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
Res. Res. Res.
rw
RM0461
control bit
EOPIE
ERRIE
RDERRIE
N/A
N/A
N/A
N/A
N/A
N/A
N/A
ECCCIE
N/A
17 16
Res. EMPTY
rw
1 0
LATENCY[2:0]
rw rw