Table 141. Modular Reduction; Table 142. Arithmetic Addition; Table 143. Arithmetic Subtraction - STMicroelectronics STM32WLEx Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0461
22.4.8
Modular reduction
Modular reduction operation consists in the computation of the remainder of A divided by n.
Operation instructions are summarized in
Parameters with direction
IN
OUT
22.4.9
Arithmetic addition
Arithmetic addition operation consists in the computation of A + B. Operation instructions
are summarized in
Parameters with direction
IN
OUT
22.4.10
Arithmetic subtraction
Arithmetic subtraction operation consists in the following computations:
If A ≥ B result equals A - B
If A < B and M/32 residue is >0 result equals A + 2
If A < B and M/32 residue is 0 result equals A + 2
Operation instructions are summarized in
Parameters with direction
IN
OUT

Table 141. Modular reduction

MODE
0x0D
Operand length
(In bits, not null)
Modulus length
(In bits, 8 < value < 3136)
Operand A
(0 ≤ A < 2n < 2
Modulus value n
(Odd integer only, n < 2
Result A mod n
(0 < result < n)
Table
142.

Table 142. Arithmetic addition

MODE
0x09
Operand length M
(In bits, not null)
Operand A
(0 ≤ < A < 2
Operand B
(0 ≤ < B < 2
Result: A+B
(0 ≤ result < 2

Table 143. Arithmetic subtraction

MODE
0x0A
Operand length M
(In bits, not null)
Operand A
(0 ≤ < A < 2
Operand B
(0 ≤ < B < 2
Result: A-B
(0 ≤ result < 2
Table
141.
Value (Note)
3136
)
3136
Value (Note)
M
)
M
)
M+1
)
int(M/32)*32
Table
143.
Value (Note)
M
)
M
)
M
)
RM0461 Rev 5
Public key accelerator (PKA)
Storage
PKA_CR
RAM@0x400
RAM@0x404
RAM@0x8B4
)
RAM@0xA44
RAM@0xBD0
Storage
PKA_CR
RAM@0x404
RAM@0x8B4
RAM@0xA44
RAM@0xBD0
int(M/32)*32+1
- B
- B
Storage
PKA_CR
RAM@0x404
RAM@0x8B4
RAM@0xA44
RAM@0xBD0
Size
6 bits
32 bits
ROS
Size
6 bits
32 bits
ROS
ROS + 1
Size
6 bits
32 bits
ROS
603/1306
617

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