STMicroelectronics STM32WLEx Reference Manual page 295

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0461
Register
Offset
name
RCC_APB2
SMENR
0x080
Reset value
RCC_
APB3SMENR
0x084
Reset value
RCC_CCIPR
0x088
0
Reset value
0x08C
Reserved
RCC_BDCR
0x090
Reset value
RCC_CSR
0x094
0
Reset value
0x098-
Reserved
0x104
RCC_
EXTCFGR
0x108
Reset value
Refer to
Table 55. RCC register map and reset values (continued)
0
0
0
0
0
0
0
0
0
1
1
0
0
0
Section 2.4
for the register boundary addresses.
1
1
0
0
0
0
0
0
0
0
Reserved
0
0
0
Reserved
1
RM0461 Rev 5
Reset and clock control (RCC)
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
SHDHPRE
[3:0]
0
0
0
0
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