STMicroelectronics STM32WLEx Reference Manual page 431

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0461
regulator of the power control unit operates in normal Run mode (refer to Reset and clock
control and power control sections).
If the main voltage regulator enters low-power mode (such as Low-power run mode), this
buffer is disabled and the ADC cannot be used.
ADC Voltage regulator enable sequence
To enable the ADC voltage regulator, set ADVREGEN bit to 1 in ADC_CR register.
ADC voltage regulator disable sequence
To disable the ADC voltage regulator, follow the sequence below:
1.
Make sure that the ADC is disabled (ADEN = 0).
2.
Clear ADVREGEN bit in ADC_CR register.
16.3.3
Calibration (ADCAL)
The ADC has a calibration feature. During the procedure, the ADC calculates a calibration
factor which is internally applied to the ADC until the next ADC power-off. The application
must not use the ADC during calibration and must wait until it is complete.
Calibration should be performed before starting A/D conversion. It removes the offset error
which may vary from chip to chip due to process variation.
The calibration is initiated by software by setting bit ADCAL to 1. It can be initiated only
when all the following conditions are met:
the ADC voltage regulator is enabled (ADVREGEN = 1 and LDORDY = 1),
the ADC is disabled (ADEN = 0), and
the Auto-off mode is disabled (AUTOFF = 0).
ADCAL bit stays at 1 during all the calibration sequence. It is then cleared by hardware as
soon the calibration completes. After this, the calibration factor can be read from the
ADC_DR register (from bits 6 to 0).
The internal analog calibration is kept if the ADC is disabled (ADEN = 0). When the ADC
operating conditions change (V
variations and temperature change to a lesser extend), it is recommended to re-run a
calibration cycle.
The calibration factor is lost in the following cases:
The power supply is removed from the ADC (for example when the product enters
Standby or VBAT mode)
The ADC peripheral is reset.
The calibration factor is lost each time power is removed from the ADC (for example when
the product enters Standby or VBAT mode). Still, it is possible to save and restore the
calibration factor by software to save time when re-starting the ADC (as long as temperature
and voltage are stable during the ADC power-down).
The calibration factor can be written if the ADC is enabled but not converting (ADEN = 1 and
ADSTART = 0). Then, at the next start of conversion, the calibration factor is automatically
injected into the analog ADC. This loading is transparent and does not add any cycle
latency to the start of the conversion.
changes are the main contributor to ADC offset
DDA
RM0461 Rev 5
Analog-to-digital converter (ADC)
431/1306
486

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