Recorder/Time Base Groups; External Clock Divider; Calculating Sample Limits For External Time Base Use; Calculation Example - HBM Genesis GEN5i User Manual

I2679-4.0 en

Recorder/Time base groups

Note Perception V6.20 and earlier use recorder settings for the next setting. In later
version of Perception these recorder settings have been replaced by Time base
group settings. The basic behavior of the "External Clock Divider" is identical.

External Clock Divider

This setting can be found at the Recorder Memory & Time base settings. Default
this setting is 1, which means that samples are stored at each external clock
pulse. If it is required that GEN DAQ only samples every third external clock
pulse, setting the "External Clock Divider" to 3 will create the required sampling
rate.
Note GEN DAQ systems cannot sample at higher speeds as the external clock signal
supplied.
G.1.3

Calculating sample limits for external time base use

External sample rates are limited per board type. See the individual
specification sheets of the different acquisition boards for details. Make sure
and check not to exceed the maximum external sample rate. Exceeding the
sample rate will results in missing samples at one or more external clock signal
events.

Calculation example

Engine runs at 10 000 RPM maximum.
6 000 RPM equals 100 rotations per second.
With a maximum external clock speed of eg. 500 kS/s (all boards having a
maximum sample rate of 1 MS/s) the maximum pulses per rotation are:
500 000 / 100 = 5 000 pulses per rotation maximum
However it is advisable not to exceed 10 % of the maximum sample rate of the
acquisition board used. As in external clock mode GEN DAQ systems internally
operate on the maximum sample rate storing the next sample after external
clock is detected.
Using a 1 MS/s acquisition boards an external clock at 500 kS/s would appear
to contain jitter of up to 1 us. The jitter then is 50 % of the external clock time
period, (1/500 kS/s = 2 µs).
GEN5i
555