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1.3
Pin Description
1.3.1
Pin Arrangement
Figures 1-2 (a) and 1.3 (a) show the pin arrangement of the H8S/2633, H8S/2632, H8S/2631, and
H8S/2633F. Figures 1-2 (b) and 1.3 (b) show the pin arrangement of the H8S/2633R. Figures
1-3 (c) shows the pin arrangement of the H8S/2695.
AVCC
Vref
P40/AN0
P41/AN1
P42/AN2
P43/AN3
P44/AN4
P45/AN5
P46/AN6/DA0
P47/AN7/DA1
P90/AN8
P91/AN9
P92/AN10
P93/AN11
P94/AN12
P95/AN13
P96/AN14/DA2
P97/AN15/DA3
AVSS
P70/TMRI01/TMCI01/DREQ0/CS4
P71/TMRI23/TMCI23/DREQ1/CS5
P72/TMO0/TEND0/CS6/SYNCI
P73/TMO1/TEND1/CS7
P74/TMO2/MRES
P75/TMO3/SCK3
P76/RxD3
P77/TxD3
MD0
MD1
MD2
Note: * The FWE pin is used only in the flash memory version.
In the mask ROM version the FWE pin is an NC pin, and should be left open or connected to VSS.
Figure 1-2 (a) H8S/2633, H8S/2632, H8S/2631, H8S/2633F Pin Arrangement
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
(TFP-120: Top View)
TOP VIEW
(TFP-120)
60
P36/RxD4
59
P35/SCK1/SCK4/SCL0/IRQ5
58
P34/RxD1/SDA0
57
P33/TxD1/SCL1
56
VSS
55
P32/SCK0/SDA1/IRQ4
54
PVCC2
53
P31/RxD0/IrRxD
52
P30/TxD0/IrTxD
51
PD7/D15
50
PD6/D14
49
PD5/D13
48
PD4/D12
47
PD3/D11
46
PD2/D10
45
PD1/D9
44
PVCC1
43
PD0/D8
42
VSS
41
PE7/D7
40
PE6/D6
39
PE5/D5
38
PE4/D4
37
PE3/D3
36
PE2/D2
35
PE1/D1
34
PE0/D0
33
P17/PO15/TIOCB2/PWM3/TCKLD
32
P16/PO14/TIOCA2/PWM2/IRQ1
31
P15/PO13/TIOCB1/TCLKC
11
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