ST STM32L4+ Series Reference Manual page 2126

USB on-the-go full-speed (OTG_FS)
56.15.6 OTG core interrupt register (OTG_GINTSTS)
Address offset: 0x014
Reset value: 0x0400 0020
This register interrupts the application for system-level events in the current mode (device
mode or host mode).
Some of the bits in this register are valid only in host mode, while others are valid in device
mode only. This register also indicates the current mode. To clear the interrupt status bits of
the rc_w1 type, the application must write 1 into the bit.
The FIFO status interrupts are read-only; once software reads from or writes to the FIFO
while servicing these interrupts, FIFO interrupt conditions are cleared automatically.
The application must clear the OTG_GINTSTS register at initialization before unmasking
the interrupt bit to avoid any interrupts generated prior to initialization.
31 30 29
WKUP SRQ DISC CIDS
INT INT INT CHG
rc_w1 rc_w1 rc_w1 rc_w1
15 14 13
ISOO ENUM USB
EOPF
DRP DNE RST
rc_w1 rc_w1 rc_w1 rc_w1
Bit 31 WKUPINT: Resume/remote wakeup detected interrupt
Wakeup interrupt during suspend(L2) or LPM(L1) state.
– During suspend(L2):
– During LPM(L1):
Note: Accessible in both device and host modes.
Bit 30 SRQINT: Session request/new session detected interrupt
In host mode, this interrupt is asserted when a session request is detected from the device.
In device mode, this interrupt is asserted when V
device. Accessible in both device and host modes.
Bit 29 DISCINT: Disconnect detected interrupt
Asserted when a device disconnect is detected.
Note: Only accessible in host mode.
Bit 28 CIDSCHG: Connector ID status change
The core sets this bit when there is a change in connector ID status.
Note: Accessible in both device and host modes.
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28 27 26 25
LPM
PTXFE HCINT
INT
rc_w1 r r
12 11 10 9
USB
ESUSP Res.
SUSP
rc_w1 rc_w1
In device mode, this interrupt is asserted when a resume is detected on the USB. In host
mode, this interrupt is asserted when a remote wakeup is detected on the USB.
This interrupt is asserted for either host initiated resume or device initiated remote wakeup
on USB.
24 23 22
IPXFR/
HPRT RST
Res. COMP
INT DET
r rc_w1 rc_w1
8 7 6
GO GI
NPTXF
Res. NAK NAK
EFF EFF
r r
BUS
RM0432 Rev 6
21 20 19 18
IN
IISOI OEP
IEPINT
XFR INT
ISO
OUT
rc_w1 r r
5 4 3 2
RXF OTG
SOF
E LVL INT
r r rc_w1 r
is in the valid range for a B-peripheral
RM0432
17 16
Res. Res.
1 0
MMIS CMOD
rc_w1 r